Parallel Supercomputing in MIMD ArchitecturesMIMD supercomputers, software, and issues Parallel Supercomputing in MIMD Architectures is devoted to supercomputing on a wide variety of Multiple-Instruction-Multiple-Data (MIMD)-class parallel machines. The book describes architectural concepts, commercial and research hardware implementations, major programming concepts, algorithmic methods, representative applications, and benefits and drawbacks. Commercial machines described include Connection Machine 5, NCUBE, Butterfly, Meiko, Intel iPSC, iPSC/2 and iWarp, DSP3, Multimax, Sequent, and Teradata. Research machines covered include the J-Machine, PAX, Concert, and ASP. Operating systems, languages, translating sequential programs to parallel, and semiautomatic parallelizing are aspects of MIMD software addressed in Parallel Supercomputing in MIMD Architectures. MIMD issues such as scalability, partitioning, processor utilization, and heterogenous networks are discussed as well. Packed with important information and richly illustrated with diagrams and tables, Parallel Supercomputing in MIMD Architectures is an essential reference for computer professionals, program managers, applications system designers, scientists, engineers, and students in the computer sciences. |
Contents
The Author XV | 5 |
Supercomputing | 5 |
Concepts | 7 |
MIMD COMPUTERS | 13 |
NCUBE | 49 |
iWarp | 61 |
iPSC and iPSC2 | 83 |
The Paragon XPS System | 95 |
BBN Butterfly | 155 |
Sequent | 193 |
Teradata | 205 |
A FineGrain Concurrent Computer | 225 |
PAX | 237 |
Concert | 247 |
Computer Vision Applications with the Associative | 253 |
MIMD SOFTWARE | 273 |
Encore Multimax | 105 |
ATT DSP3 | 131 |
The Meiko Computing Surface | 139 |
MIMD ISSUES | 335 |
Computer Calculation | 347 |
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Common terms and phrases
address space algorithm AMPs application architecture arithmetic array bandwidth bits block buffer Butterfly cache calculation column communication agent computer vision Computing Surface configuration connected Control Network control processor Data Network dynamic efficient elements environment equation Ethernet example execution floating-point Fortran function global hardware host hypercube IEEE implementation input instruction integer interconnection interface iteration iWarp iWarp cell kernel loop machine mapping matrix Mbytes MFLOPS microprocessor MIMD Multibus multicomputer Multimax multiple multiprocessor neighbors number of processors operands operating system output overhead Paragon parallel computers parallel processing parallel programming partitioning path pathway performance phase pipeline pixel problem Proc processing nodes provides PTOOL result routing scalable sequential shared memory SIMD simulation single speed-up supercomputers switch synchronization systolic task Teradata topology Trollius tuple tuple space UMAX Uniform System UNIX variables vector Warp Ynet