Logically Determined Design: Clockless System Design with NULL Convention Logic
This seminal book presents a new logically determined designmethodology for designing clockless circuit systems. The bookpresents the foundations, architectures and methodologies toimplement such systems. Based on logical relationships, itconcentrates on digital circuit system complexity and productivityto allow for more reliable, faster and cheaper products.
* Transcends shortcomings of Boolean logic.
* Presents theoritical foundations, architecture and analysis ofclockless (asynchronous) circuit design.
* Contains examples and exercises making it ideal for thosestudying the area.
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11 Pipeline Buffering
12 Ring Behavior
13 Interacting Pipeline Structures
14 Complex Pipeline Structures
Appendix A Logically Determined Wavefront Flow
Appendix B Playing with 2NCL
Appendix C Pipeline Simulation
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24 cycle 2D pipelined 2NCL combinational expression 2NCL expression 3NCL 4NCL acknowledge path acknowledge signal binary Boolean functions Boolean logic bubble population bubble shadow bubbles flowing buffer cycles C-element completeness criterion configuration control value control variable cycle 24 cycle period DATA bubble data path DATA value DATA wavefront NULL detect digit encoding fan-in fan-out force zeros full adder function map implemented initialized input–output cycles logic expression Logically Determined Design logically determined system lower pipeline minterm MUTEX N T F NPN classes NULL bubble NULL wavefront optimal orphan paths pipeline structure population period register file registration stage rejoin period renewal path request shadow coverage shadows projected shared completeness path shown in Figure simulation slow cycle slowest cycle steered synchronized Theseus Logic throughput tics upper pipeline value variable WAVE 2 WAVE wavefront DATA wavefront wavefront flows wavefront NULL wavefront wavefront population wavefront propagation wavefronts per 100 XOR XOR XOR
Page 285 - Michiel Ligthart, Karl Fant, Ross Smith, Alexander Taubin, and Alex Kondratyev. Asynchronous Design Using Commercial HDL Synthesis Tools. In Sixth Int.