See MIPS RunSee MIPS Run, Second Edition, is not only a thorough update of the first edition, it is also a marriage of the best-known RISC architecture--MIPS--with the best-known open-source OS--Linux. The first part of the book begins with MIPS design principles and then describes the MIPS instruction set and programmers’ resources. It uses the MIPS32 standard as a baseline (the 1st edition used the R3000) from which to compare all other versions of the architecture and assumes that MIPS64 is the main option. The second part is a significant change from the first edition. It provides concrete examples of operating system low level code, by using Linux as the example operating system. It describes how Linux is built on the foundations the MIPS hardware provides and summarizes the Linux application environment, describing the libraries, kernel device-drivers and CPU-specific code. It then digs deep into application code and library support, protection and memory management, interrupts in the Linux kernel and multiprocessor Linux. Sweetman has revised his best-selling MIPS bible for MIPS programmers, embedded systems designers, developers and programmers, who need an in-depth understanding of the MIPS architecture and specific guidance for writing software for MIPS-based systems, which are increasingly Linux-based.
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... register and the return - address register must be saved and restored . Within _do_watch , more registers are used . A general mechanism to save registers was needed . On the Titan , the native compiler sets aside one register , $ fp ...
... FP Registers 32 32 - bit 32 64 - bit 16 128 - bit 32 32 - bit GPR 32 32 - bit 16 64 - bit Table 1 : Differences in the register model of SPARC - V9 ISA and SimpleScalar PISA . Instruction translation was significantly simplified because ...
... Registers ( GPRS ) and the special registers ( PC , etc ) , which are local to the CPU , and the FP registers , which are local to the FPU , and memory . In case of an FP exception , the system state saved for a pipelined FP instruction ...
... registers to cope with that amount of in-flight instructions. Again, we have classified physical register usage ... FP Registers usage on FP applications Fig. 1. CFG of Quicksort Kernel. 14 Adrián Cristal et al.
... fp numbers in a t - digit accumulator with g ≥ 0 guard digit registers and a one bit overflow register . The guard digit registers are used to extend the precision of the accumulator to t + g digits , for accumulating intermediate ...
Contents
1 | |
29 | |
53 | |
79 | |
Chapter 5 Exceptions Interrupts and Initialization | 105 |
Chapter 6 Lowlevel Memory Management and the TLB | 131 |
Chapter 7 FloatingPoint Support | 151 |
Chapter 8 Complete Guide to the MIPS Instruction Set | 183 |
Chapter 13 GNULinux from Eight Miles High | 363 |
Chapter 14 How Hardware and SoftwareWork Together | 371 |
Chapter 15 MIPS Specific Issues in the Linux Kernel | 399 |
Chapter 16 Linux Application Code PIC and Libraries | 409 |
Appendix A MIPS Multithreading | 415 |
Appendix B Other Optional Extensions to the MIPS Instruction Set | 425 |
MIPS Glossary | 431 |
References | 477 |
Chapter 9 Reading MIPS Assembly Language | 263 |
Chapter 10 Porting Software to the MIPS Architecture | 279 |
Chapter 11 MIPS Software Standards ABIs | 311 |
Chapter 12 Debugging MIPS DesignsDebug and Profiling Features | 339 |
Online Resources | 478 |
Index | 481 |
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Technische Informatik: eine einführende Darstellung Bernd Becker,Paul Molitor No preview available - 2008 |