See MIPS RunSee MIPS Run, Second Edition, is not only a thorough update of the first edition, it is also a marriage of the best-known RISC architecture--MIPS--with the best-known open-source OS--Linux. The first part of the book begins with MIPS design principles and then describes the MIPS instruction set and programmers’ resources. It uses the MIPS32 standard as a baseline (the 1st edition used the R3000) from which to compare all other versions of the architecture and assumes that MIPS64 is the main option. The second part is a significant change from the first edition. It provides concrete examples of operating system low level code, by using Linux as the example operating system. It describes how Linux is built on the foundations the MIPS hardware provides and summarizes the Linux application environment, describing the libraries, kernel device-drivers and CPU-specific code. It then digs deep into application code and library support, protection and memory management, interrupts in the Linux kernel and multiprocessor Linux. Sweetman has revised his best-selling MIPS bible for MIPS programmers, embedded systems designers, developers and programmers, who need an in-depth understanding of the MIPS architecture and specific guidance for writing software for MIPS-based systems, which are increasingly Linux-based.
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From inside the book
Results 1-5 of 72
... TLB/MMU Hardware and What It Does 131 6.2 TLB/MMU Registers Described 132 6.2.1 TLB Key Fields—EntryHi and PageMask 134 6.2.2 TLB Output Fields—EntryLo0-1 136 Chapter 7 6.2.3 Selecting a TLB Entry—Index, Random, and Wired Contents ix.
Dominic Sweetman. Chapter 7 6.2.3 Selecting a TLB Entry—Index, Random, and Wired Registers 137 6.2.4 Page-Table Access Helpers—Context and XContext 138 6.3 TLB/MMU Control Instructions 140 6.4 Programming the TLB 141 6.4.1 How Refill ...
... Access to “Under the Hood” Features 261 Chapter 9 Reading MIPS Assembly Language 263 9.1 A Simple Example 264 9.2 Syntax Overview 268 9.2.1 Layout, Delimiters, and Identifiers 268 9.3 General Rules for Instructions 269 Chapter 10 ...
... entries in the memory management unit (the TLB) or by using some of the extra spaces available in 64-bit CPUs. Kernel. versus. User. Privilege. Level. With kernel privileges (where the CPU starts up) it can do anything. In user mode, ...
... access low addresses just as if they were in user mode, and they will be ... access to the lowest and highest 2 GB of the 64-bit program space. So the extended ... TLB). Pipeline. Visibility. Any pipelined CPU hardware is always subject to ...
Contents
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29 | |
53 | |
79 | |
Chapter 5 Exceptions Interrupts and Initialization | 105 |
Chapter 6 Lowlevel Memory Management and the TLB | 131 |
Chapter 7 FloatingPoint Support | 151 |
Chapter 8 Complete Guide to the MIPS Instruction Set | 183 |
Chapter 13 GNULinux from Eight Miles High | 363 |
Chapter 14 How Hardware and SoftwareWork Together | 371 |
Chapter 15 MIPS Specific Issues in the Linux Kernel | 399 |
Chapter 16 Linux Application Code PIC and Libraries | 409 |
Appendix A MIPS Multithreading | 415 |
Appendix B Other Optional Extensions to the MIPS Instruction Set | 425 |
MIPS Glossary | 431 |
References | 477 |
Chapter 9 Reading MIPS Assembly Language | 263 |
Chapter 10 Porting Software to the MIPS Architecture | 279 |
Chapter 11 MIPS Software Standards ABIs | 311 |
Chapter 12 Debugging MIPS DesignsDebug and Profiling Features | 339 |
Online Resources | 478 |
Index | 481 |
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Technische Informatik: eine einführende Darstellung Bernd Becker,Paul Molitor No preview available - 2008 |