See MIPS RunSee MIPS Run, Second Edition, is not only a thorough update of the first edition, it is also a marriage of the best-known RISC architecture--MIPS--with the best-known open-source OS--Linux. The first part of the book begins with MIPS design principles and then describes the MIPS instruction set and programmers’ resources. It uses the MIPS32 standard as a baseline (the 1st edition used the R3000) from which to compare all other versions of the architecture and assumes that MIPS64 is the main option. The second part is a significant change from the first edition. It provides concrete examples of operating system low level code, by using Linux as the example operating system. It describes how Linux is built on the foundations the MIPS hardware provides and summarizes the Linux application environment, describing the libraries, kernel device-drivers and CPU-specific code. It then digs deep into application code and library support, protection and memory management, interrupts in the Linux kernel and multiprocessor Linux. Sweetman has revised his best-selling MIPS bible for MIPS programmers, embedded systems designers, developers and programmers, who need an in-depth understanding of the MIPS architecture and specific guidance for writing software for MIPS-based systems, which are increasingly Linux-based.
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From inside the book
Results 1-5 of 82
... Bytes, and Bit Order 281 10.2.1 Bits, Bytes, Words, and Integers 281 10.2.2 Software and Endianness 284 10.2.3 Hardware and Endianness 287 10.2.4 Bi-endian Software for a MIPS CPU 293 10.2.5 Portability and Endianness-Independent Code ...
... register value modified by a 16-bit signed displacement (a limited register-plus-register address mode is available for floating-point data). Byte-addressed: Once data is in a register of a MIPS 24 Chapter 1—RISCs and MIPS Architectures.
... Bytes can be transferred at any address, but halfwords must be even-aligned and word transfers aligned to four-byte boundaries. Many CISC microprocessors will load/store a four-byte item from any byte address, but the penalty is extra ...
... bytes in a single operation. Naming conventions used in the documentation and to build instruction mnemonics are as ... byte, bit 15 of a halfword). This correctly converts a signed integer value to a 32-bit signed integer, as shown in ...
... byte-wide memory location whose address is in t1 contains the value 0xFE (−2, or 254 if interpreted as unsigned) ... byte boundaries and words only from four-byte boundaries. A load instruction with an unaligned address will produce a ...
Contents
1 | |
29 | |
53 | |
79 | |
Chapter 5 Exceptions Interrupts and Initialization | 105 |
Chapter 6 Lowlevel Memory Management and the TLB | 131 |
Chapter 7 FloatingPoint Support | 151 |
Chapter 8 Complete Guide to the MIPS Instruction Set | 183 |
Chapter 13 GNULinux from Eight Miles High | 363 |
Chapter 14 How Hardware and SoftwareWork Together | 371 |
Chapter 15 MIPS Specific Issues in the Linux Kernel | 399 |
Chapter 16 Linux Application Code PIC and Libraries | 409 |
Appendix A MIPS Multithreading | 415 |
Appendix B Other Optional Extensions to the MIPS Instruction Set | 425 |
MIPS Glossary | 431 |
References | 477 |
Chapter 9 Reading MIPS Assembly Language | 263 |
Chapter 10 Porting Software to the MIPS Architecture | 279 |
Chapter 11 MIPS Software Standards ABIs | 311 |
Chapter 12 Debugging MIPS DesignsDebug and Profiling Features | 339 |
Online Resources | 478 |
Index | 481 |
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Technische Informatik: eine einführende Darstellung Bernd Becker,Paul Molitor No preview available - 2008 |