See MIPS RunSee MIPS Run, Second Edition, is not only a thorough update of the first edition, it is also a marriage of the best-known RISC architecture--MIPS--with the best-known open-source OS--Linux. The first part of the book begins with MIPS design principles and then describes the MIPS instruction set and programmers’ resources. It uses the MIPS32 standard as a baseline (the 1st edition used the R3000) from which to compare all other versions of the architecture and assumes that MIPS64 is the main option. The second part is a significant change from the first edition. It provides concrete examples of operating system low level code, by using Linux as the example operating system. It describes how Linux is built on the foundations the MIPS hardware provides and summarizes the Linux application environment, describing the libraries, kernel device-drivers and CPU-specific code. It then digs deep into application code and library support, protection and memory management, interrupts in the Linux kernel and multiprocessor Linux. Sweetman has revised his best-selling MIPS bible for MIPS programmers, embedded systems designers, developers and programmers, who need an in-depth understanding of the MIPS architecture and specific guidance for writing software for MIPS-based systems, which are increasingly Linux-based.
|
From inside the book
Results 1-5 of 95
... Control Instructions 55 3.2 Which Registers Are Relevant When? 58 3.3 CPU Control Registers and Their Encoding 59 3.3.1 Status Register (SR) 60 3.3.2 Cause Register 64 3.3.3 Exception Restart Address (EPC) Register 65 3.3.4 Bad Virtual ...
... Registers 159 7.5.1 Conventional Names and Uses of Floating-Point Registers 160 7.6 Floating-Point Exceptions/Interrupts 161 7.7 Floating-Point Control: The Control/Status Register 161 7.8 Floating-Point Implementation Register 165 7.9 ...
... Registers, Particularly Debug 348 12.1.8 The DCR (Debug Control) Memory-Mapped Register 351 12.1.9 EJTAG Breakpoint Hardware 352 12.1.10 Understanding Breakpoint Conditions 355 12.1.11 Imprecise Debug Breaks 356 12.1.12 PC Sampling with ...
... control registers, interrupts, traps, cache manipulation, and memory management. But at least we can cut the task ... register-to-register calculations. When MIPS CPUs began to be used in embedded systems, new instructions aimed at ...
... control registers to make a modern FPU behave like an old one. Conventional ... register is reserved for the synthetic instructions generated by the assembler. Where you must use it ... Registers with Usage Mnemonics Register 2.2 Registers 35.
Contents
1 | |
29 | |
53 | |
79 | |
Chapter 5 Exceptions Interrupts and Initialization | 105 |
Chapter 6 Lowlevel Memory Management and the TLB | 131 |
Chapter 7 FloatingPoint Support | 151 |
Chapter 8 Complete Guide to the MIPS Instruction Set | 183 |
Chapter 13 GNULinux from Eight Miles High | 363 |
Chapter 14 How Hardware and SoftwareWork Together | 371 |
Chapter 15 MIPS Specific Issues in the Linux Kernel | 399 |
Chapter 16 Linux Application Code PIC and Libraries | 409 |
Appendix A MIPS Multithreading | 415 |
Appendix B Other Optional Extensions to the MIPS Instruction Set | 425 |
MIPS Glossary | 431 |
References | 477 |
Chapter 9 Reading MIPS Assembly Language | 263 |
Chapter 10 Porting Software to the MIPS Architecture | 279 |
Chapter 11 MIPS Software Standards ABIs | 311 |
Chapter 12 Debugging MIPS DesignsDebug and Profiling Features | 339 |
Online Resources | 478 |
Index | 481 |
Other editions - View all
Common terms and phrases
Popular passages
References to this book
Technische Informatik: eine einführende Darstellung Bernd Becker,Paul Molitor No preview available - 2008 |